On-Chip Training Npu - Algorithm, Architecture and Soc Design by Han, Donghyeon
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On-Chip Training Npu - Algorithm, Architecture and Soc Design by Han, Donghyeon

On-Chip Training Npu - Algorithm, Architecture and Soc Design

Springer
Price:
$187.19

Description

Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding.



Author: Donghyeon Han, Hoi-Jun Yoo
Publisher: Springer
Published: 07/28/2023
Pages: 237
Binding Type: Hardcover
Weight: 1.19lbs
Size: 9.21h x 6.14w x 0.63d
ISBN13: 9783031342363
ISBN10: 3031342364
BISAC Categories:
- Technology & Engineering | Electronics | Circuits | General
- Computers | Computer Architecture